NVC VHDL Simulator Nick Gasson
Use this command to install NVC VHDL Simulator:
winget install --id=NickGasson.NVC -e A free software VHDL compiler and simulator implementing almost all of IEEE 1076-2008.
NVC VHDL Simulator is a free software tool designed to compile and simulate VHDL code according to IEEE 1076-2008 standards. Offering robust support for almost all features of the standard, it provides engineers with accurate simulation results to verify hardware designs effectively.
Key Features:
- Comprehensive implementation of IEEE 1076-2008 VHDL standard
- Free and open-source solution for VHDL compilation and simulation
- Installable via winget for seamless integration into development workflows
Audience & Benefit: Ideal for hardware engineers, FPGA/ASIC designers, and students working on digital design projects. It enables precise verification of VHDL-based systems, ensuring reliable outcomes in the design process.
Versions
1.16.1
1.16.0
1.15.2
1.15.1
1.15.0
1.14.2
1.14.1
1.13.1
1.12.0001
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